Signal Assignment
Statements

ARCHITECTURE stuff OF my_entity IS
    SIGNAL ThisBit : BIT;
    SIGNAL ThisBitVector : BIT_VECTOR(1 to 5)
    SIGNAL ThisInteger : INTEGER;
    SIGNAL ThisString : STRING(1 to 4);
BEGIN
   .
   .
END stuff;

ThisBit <= '1';

ThisBitVector <= "10010";


ThisInteger <= 567 after 10ns;

ThisString <= "VHDL" after 10ns,
                    "is  " after 20ns,
                    "fun!" after 30ns;