Exercising the SDSP Model
Suppose we wish to determine the effect of memory access time on the execution of speed of the SDSP?
Modify the SDSP to have a memory access time independent of the SDSP clock
Add to the SDSP model a means to determine the number of the clock cycles executed by a DSP benchmark routine
Simulate the SDSP using the benchmark for memory access speeds of 20, 40, 60, 80, and 100 nsecs
Plot and summarize your results
