Case Study of the SDSP Microprocessor
Organization
Simple 32-bit microprocessor with
32-bit address and data bus
256-word register file
3-operand addressing
"Quick" mode for arithmetic and I/O instructions
On reset, the SDSP PC initialized to zero; all other regs undefined
By convention, R0 holds zero - but must be set by software
Condition codes:
V: overflow (set by arithmetic result larger that can be represented)
N: negative (set if arithmetic result is negative)
Z: zero (set if arithmetic or logic result is zero)
