Queue System VHDL Model

LIBRARY queue;
USE queue.queue_pkg.all;
USE std.textio.all;

ENTITY open_system is
END open_system;

ARCHITECURE example OF open_system IS

  SIGNAL arc1, arc2, arc3, arc4, arc5, arc6, 
         arc7, arc8, arc9, arc10, arc11 : arc bus;
                 .
                 .
          <component declarations>
                 .
                 .
  BEGIN
           <architecture>
  END example;