F2 Implementation

Create a 4 input NAND gate from 2-input ANDs, inverter

‘00

‘08

‘08

‘08

‘04

‘10

B

F2 = A’B’C’D’ + BCD

3 gates from ‘08, 1 from ‘10, 1 from ‘00

C

D

A’

B’

C’

D’

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