library ieee;
use ieee.std_logic_1164.all;
--use work.cypress.all;

-- Datapath, part b,  for dice game
-- point register, comparator, test logic
-- 
entity dpathb is
  port (  clk,reset:  in std_logic;
          dicesum:    in std_logic_vector(3 downto 0);
          sp:         in std_logic;
	  point:      out std_logic_vector(3 downto 0);
          eq:         out std_logic;
          d7_i:       out std_logic;
	  d11_i:      out std_logic;
	  d2312_i:    out std_logic
	);
end dpathb;

-- look at report file for pin assignments

architecture a of dpathb is

   signal q,d: std_logic_vector (3 downto 0);
  


 begin


  point <= q; 

-- State Flip Flops
  stateff: process (clk,reset)
   begin
   if (reset = '1') then
     q   <= "0000";
   elsif (clk'event and clk='1') then
     q <= d;  
   end if;
  end process stateff;

  -- equations for D inputs of point register

  d <= dicesum when (sp = '1') else q;


  -- other equations
  eq <= '1' when (dicesum = q) else '0';

  d7_i <= '1' when (dicesum = "0111") else '0';
  d11_i <= '1' when (dicesum = "1011") else '0';
  d2312_i <= '1' when ( (dicesum = "0010") or
                        (dicesum = "0011") or
                        (dicesum = "1100") )
	      else '0';



end a;